1. Field of the Invention
The present invention relates to a semiconductor device. More specifically, the present invention relates to a flash memory device and a method of manufacturing the same.
2. Description of the Related Art
In general, a flash memory is a kind of PROM (programmable ROM) that is capable of electrically re-writing data. The flash memory can perform programming like an erasable PROM (EPROM) and erasing like an electrically erasable PROM (EEPROM) using one transistor. Flash memory combines the advantages of an EPROM, in which a memory cell includes one transistor so that a cell area is small, and the EEPROM, in which data can be electrically erased. However, in an EPROM, data must be erased at one time by UV rays. In addition, an EEPROM cell includes two transistors, so that a cell area becomes large. Another name of the flash memory is a flash EEPROM. The flash memory is referred to as a nonvolatile memory since stored information is not erased although power is turned off, which is different from a dynamic RAM (DRAM) or a static RAM (SRAM).
The flash memory may be classified as a NOR-type structure in which cells are arranged in a row between a bit line and a ground, or a NAND-type structure in which cells are arranged in series between the bit line and the ground. Since the NOR-type flash memory having the parallel structure can perform high speed random access when a reading operation is performed, the NOR-type flash memory is widely used for booting a mobile telephone. The NAND-type flash memory having the serial structure has low reading speed but high writing speed so that the NAND-type flash memory is suitable for storing data and is advantageous for miniaturization. The flash memory cell may be classified as a stack gate type or a split gate type in accordance with the gate structure in a unit cell. In addition, nonvolatile memory can be classified as a floating gate device or a silicon-oxide-nitride-oxide-silicon (SONOS) device in accordance with the materials in the charge storage layer.
Among them, the SONOS type flash memory may have better reliability than the floating gate type flash memory, and it is possible to perform programming and erasing operations at low voltage, because the gate insulating layer includes a charge storage layer (usually an oxide-nitride-oxide (ONO) structure which comprises a silicon oxide tunneling layer, a silicon nitride trapping layer, and a silicon oxide blocking layer), and because a charge is trapped in a deep energy level corresponding to the nitride layer.
FIG. 1 shows a structure of an ordinary SONOS type flash memory. Referring to FIG. 1, a multilayered charge storage layer 18 is interposed between a substrate 10 and a control gate 20. The multilayered charge storage layer 18 is formed by stacking a tunnel oxide layer 18a, a silicon nitride layer 18b, and a blocking oxide layer 18c. The control gate 20 is formed on the multilayered charge storage layer 18, and has sidewall insulating spacers 22 on sidewalls thereof.
Meanwhile, in the case of the SONOS type flash memory, the control gate 20 formed as described above is formed into a word line. In order to increase an integration density of the flash memory, the control gate 20 constructing a plurality of word lines must have very small critical dimension (CD). Recently, the CD of the control gate 20 has been scaled down to a nano scale. In this manner, when the width of a gate is reduced, a channel formed underneath the gate is also very narrow. When a length of the channel is shortened, a so-called short channel effect can give rise to a phenomenon in which a relatively large current abruptly flows between a drain and a source. Thus, a threshold voltage of the flash memory may be lowered and cause a malfunction.